AMD has been in the news for the past couple of months for crushing the Intel’s Core i9 10900K and doing this is not an easy deal without doing some really great changes to an already great Ryzen 9 3900x. So, Today I will be covering the Architecture that helped AMD to come to this position.
For the Last few decades, the Moore’s law has been governing the pace of Innovation in the Semiconductor World.
The Moore’s law stated that the speed of microchips or computer shall keep increasing by double every two years as the result of increasing the number of transistors on a microchip and since 1965 (when it was written) it has held itself true but only until 2015 when the Moore’s law started getting slow as there was no more room in the microchips or CPUs to put the transistors in due to the scientific reasons about the Silicon.
As, Intel was leading the market till then without any big competition they decided not to innovate anything new to increase the speeds of their CPUs and kept adding the more transistors as they could in their CPUs to keep them fast for next generations and called them as a refreshed version of the previous. So, the small increments were justified.
As, there was no major competition to Intel, and they did not innovate in their SoC designs. Meanwhile when this was going on AMD was still in the market but were not able to give any competition to Intel due to their almost identical speeds to Intel at the same identical price. Thus, no one wanted to invest in them as the most software’s were also not mostly optimized for them.
But on 7 July 2019, AMD Officially revised their CPU Design with the Introduction of 7nm Process, Chiplets, Revised Microarchitecture & Cache Hirearchy in their CPU Packages and that allowed them to get a 15% IPC Increase and a decrease in cost over Intel.
These new AMD CPUs were designed to use The Chiplet design instead of the previous Monolithic Design used by Intel as well.
The Chiplet Approach
A new processor design was needed to keep the Moore’s Law at its pace by giving the incremental gains that they used to get over the time. The solution that AMD kicked in was the already established Chiplet Approach, This approach proposes to build a single processor package with the help of several different identical chiplets. Chiplets make it faster and cheaper to flexibly assemble I/O, Memory and Processor Cores and make a CPU Package.
As, the chiplets are made to be modular they allow the company to make a bunch of these modular dies and combine it with whichever IO / DRAM Controllers they need and make it however much powerful they want it to be. Hence, allowing AMD to use the same cores from Ryzen to EPYC with just replacing one die in the CPU Package. This technique also makes the CPUs cheaper by increasing the Yield rate of the CPU.
They Decreased the Cost by Increasing the Yields
Each die in a CPU is made from a Silicon wafer and the wafers are not necessarily perfect meaning that these wafers will contain several defects. So, when we cut a monolithic block from these wafers that means if a part of the wafer (that is cut) is defective a whole big monolithic will be of no use. Whereas, if we cut down a smaller size of these wafers that means if a part of the wafer is defective it will only affect a mini die not a whole big monolithic block.
This technique also allows to take chiplets that are functional but not as good to be used in lower end CPU lines (like APUs) allowing them to recover some of the loss.
These previously decreased yields forced the manufacturers to add these defective CPU Manufacturing cost to the working ones to square off the losses hence increasing the CPU Retail Price but this chiplet manufacturing process allows AMD to add less of these amounts to the actual retail price of the Processor.
The Power of 7nm Process
The 7nm Process was also a big step towards the IPC (Instructions per clock) gains in the Chiplets. The major benefit that was gained from the 7nm Process was by combining the overall memory and I/O interfaces onto a Monolithic die. It helps increase in performance by decreasing the latency of the Chiplets to connect to I/O Die.
There were many more things that were done to the SoCs to increase the IPC but these were the major ones which I covered. I think the Chiplet approach will lead the industry for the coming future if done well.
Disclaimer: All the views expressed in this article is purely as per the knowledge / belief of the author.